Title :
Highly reliable Cu interconnect strategy for 10nm node logic technology and beyond
Author :
Kim, R.-H. ; Kim, B.H. ; Matsuda, T. ; Kim, J.N. ; Baek, J.M. ; Lee, J.J. ; Cha, J.O. ; Hwang, J.H. ; Yoo, S.Y. ; Chung, K.-M. ; Park, K.H. ; Choi, J.K. ; Lee, E.B. ; Nam, S.D. ; Cho, Y.W. ; Choi, H.J. ; Kim, J.S. ; Jung, S.Y. ; Lee, D.H. ; Kim, I.S. ; Pa
Author_Institution :
Samsung Electron. Co., Ltd., Hwasung, South Korea
Abstract :
CVD-Ru represents a critically important class of materials for BEOL interconnects that provides Cu reflow capability. The results reported here include superior gap-fill performance, a solution for plausible integration issues, and robust EM / TDDB properties of CVD-Ru / Cu reflow scheme, by iterative optimization of process parameters, understanding of associated Cu void generation mechanism, and reliability failure analysis, thereby demonstrating SRAM operation at 10 nm node logic device and suggesting its use for future BEOL interconnect scheme.
Keywords :
SRAM chips; chemical vapour deposition; copper; failure analysis; integrated circuit interconnections; integrated circuit reliability; iterative methods; logic devices; optimisation; ruthenium; BEOL interconnect scheme; CVD; Cu; SRAM operation; associated void generation mechanism; electromigration; gap-fill performance; highly reliable interconnect strategy; iterative optimization; logic device technology; plausible integration issues; process parameters; reflow capability; reliability failure analysis; robust EM-TDDB properties; size 10 nm; time dependent dielectric breakdown; Failure analysis; Metals; Optimization; Performance evaluation; Resistance; Robustness;
Conference_Titel :
Electron Devices Meeting (IEDM), 2014 IEEE International
DOI :
10.1109/IEDM.2014.7047153
