Integrated circuit design and implementation for a new optimum Manchester decoder

Author

Markarian, Garik ; Honary, Bahram ; King, Daniel ; Kissaka, M.

Author_Institution

Commun. Res. Center, Lancaster Univ.

Volume

2

fYear

1995

Firstpage

1460

Abstract

This paper describes the design and implementation of an integrated circuit for a new optimum decoding algorithm for Manchester code. It is shown that the proposed algorithm is using the symmetrical properties of the Manchester code and provides 3 dB energy gain in comparison with the hard decision decoding. The decoder has been designed using a 2.4 μm CMOS technology and the implementation and performance results have been tested for a 10 Mbit/sec information rate which is similar to the Ethernet specification

Keywords

CMOS digital integrated circuits; channel capacity; integrated circuit design; maximum likelihood decoding; 10 Mbit/s; 2.4 μm CMOS technology; 2.4 micron; Ethernet specification; IC implementation; Manchester code; energy gain; hard decision decoding; information rate; integrated circuit design; maximum likelihood decoding algorithm; optimum Manchester decoder; optimum decoding algorithm; performance results; symmetrical properties; AWGN; Algorithm design and analysis; CMOS technology; Costs; Gain; Integrated circuit synthesis; Integrated circuit technology; Maximum likelihood decoding; Signal processing algorithms; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Global Telecommunications Conference, 1995. GLOBECOM '95., IEEE

Print_ISBN

0-7803-2509-5

Type

conf

DOI

10.1109/GLOCOM.1995.502644

Filename

502644