DocumentCode
3565868
Title
Hardware pulse mode neural network with piecewise linear activation function neurons
Author
Hikawa, Hiroomi
Author_Institution
Oita Univ., Japan
Volume
2
fYear
2002
fDate
6/24/1905 12:00:00 AM
Abstract
This paper proposes a new type of digital pulse mode neuron that employs a piecewise linear function as its activation function. The pulse mode multilayer neural network (MNN) with on-chip learning is implemented with the proposed neuron. By approximating the Sigmoid function by the piecewise linear function, the convergence rate of the learning is improved. The proposed MNN is implemented on FPGA and its feasibility is verified by experiments
Keywords
convergence; field programmable gate arrays; integrated circuit design; learning (artificial intelligence); multilayer perceptrons; neural chips; piecewise linear techniques; FPGA implementation; MNN; Sigmoid function; digital pulse mode neuron; hardware pulse mode neural network; learning convergence rate; on-chip learning; piecewise linear activation function neurons; pulse mode multilayer neural network; Field programmable gate arrays; Hardware; Multi-layer neural network; Multiplexing; Network-on-a-chip; Neural networks; Neurons; Piecewise linear approximation; Piecewise linear techniques; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1011040
Filename
1011040
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