Utilization of adaptive PHIL interfaces for harmonic load cases

Power hardware-in-the-loop (PHIL) is an important tool for testing and verifying various aspects of systems level research. It provides a realistic assessment of how a device will interact under various conditions and environments, allowing the testing process to truly vet the apparatuses before full scale deployment. Crucial to the PHIL concept, is the hardware-in-the-loop interface. Interfaces must be accurate, stable and able to pass through dynamics so that the hardware under test sees the most realistic view of the remainder to the system and vice versa. The damping impedance method (DIM) provides the appropriate characteristics for dynamic load applications but its philosophy requires some modification when in a system that has considerable harmonic content in either voltage and/or current. This paper will provide a modified DEVI (MDEVI) method for PHIL applications to meet this criteria. Specifically, it will investigate a power-electronic-based system with a load containing harmonic content and will compare the accuracy of the results against a traditional DEVI interface method.