DocumentCode
3567128
Title
A novel submodule capacitor voltage balancing scheme for hybrid cascaded multilevel converter by injection of zero sequence current
Author
Mathew, Ebin Cherian ; Shukla, Anshuman
Author_Institution
Electr. Eng. Dept., Indian Inst. of Technol. Bombay, Mumbai, India
fYear
2014
Firstpage
4534
Lastpage
4540
Abstract
Multilevel converters with fault tolerant capability are getting increased importance in the HVDC systems. This paper describes the working principle and submodule capacitor voltage balancing issues of the Hybrid Cascaded Multilevel converter (HCMC). The converter involves lesser number of sub-modules and provides excellent DC side fault tolerant capability in an HVDC system. The paper analyzes the submodule capacitor voltage balancing issues associated with this converter. A novel submodule capacitor voltage balancing scheme for the HCMC by the injection of zero sequence current is proposed in this paper. The efficacy of the proposed scheme is verified with the help of simulation study done in PSCAD/EMTDC.
Keywords
CAD; HVDC power convertors; EMTDC; HVDC systems; PSCAD; hybrid cascaded multilevel converter; submodule capacitor voltage balancing; zero sequence current; Capacitors; Circuit faults; HVDC transmission; Harmonic analysis; Modulation; Power system harmonics; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics Society, IECON 2014 - 40th Annual Conference of the IEEE
Type
conf
DOI
10.1109/IECON.2014.7049186
Filename
7049186
Link To Document