DocumentCode :
3567766
Title :
Degradation mechanism during gate stress at high electrical field on high voltage MOSFET for non-volatile memory applications
Author :
Carmona, M. ; Lopez, L. ; Ogier, J.-L. ; Goguenheim, D.
Author_Institution :
STMicroelectron., Rousset, France
fYear :
2014
Firstpage :
147
Lastpage :
150
Abstract :
In this paper, gate stress at high electrical field has been studied on High Voltage MOSFETs used for Non-Volatile Memory applications. Charge pumping measurements and characteristic Capacitance-Voltage have been applied to demonstrate that degradation mechanism of n- and p-channel transistors is firstly due to charge fixed trapping by Anode Hole Injection, and then dependent on where electrons are injected, i.e. from gate or from substrate. Furthermore, low activation energy has been found for positive stress on n- and p-MOSFETs.
Keywords :
MOSFET; anodes; capacitance; charge pump circuits; electric fields; power integrated circuits; random-access storage; stress analysis; anode hole injection; characteristic capacitance-voltage; charge fixed trapping; charge pumping measurements; degradation mechanism; electron injection; gate stress; high electrical field; high voltage MOSFET; low activation energy; n-and p-MOSFET; n-and p-channel transistors; nonvolatile memory applications; positive stress; Capacitance-voltage characteristics; Charge carrier processes; Degradation; Interface states; Logic gates; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report (IIRW), 2014 IEEE International
Print_ISBN :
978-1-4799-7308-8
Type :
conf
DOI :
10.1109/IIRW.2014.7049532
Filename :
7049532
Link To Document :
بازگشت