A qualitative-modeling-based low-power silicon nerve membrane

The silicon neuronal network is an electronic circuit system that reproduces the electrophysiological activities of the nervous system in real-time or faster, which is composed of silicon neuron circuits connected via silicon synapse circuits. It is a candidate for the next-generation computing platform because it is expected to realize the low-power, autonomous, and intelligent information processing similar to the brain. The dynamical property of silicon neuron circuits is a most important factor for information processing in the silicon neuronal networks. In many silicon neuron circuits, however, their spike generation dynamics is drastically approximated by resetting of the state variables. We have developed a silicon nerve membrane circuit which is free of this approximation and configurable to Class I and II in the Hodgkin´s classification after fabrication. By using mathematical techniques in the qualitative neuronal modeling, we accomplished low-power consumption around 3 nW, which is comparable to the leading-edge silicon neuron circuits. It was designed for TSMC 0.25μm CMOS process and all the transistors are in their subthreshold domain. In this article, its simulation results by Spectre software are reported.