• DocumentCode
    3568657
  • Title

    An 8-bit I/O-sized ADC with second-order TDC and MOM capacitor voltage-to-time converter

  • Author

    Okuno, Keisuke ; Konishi, Toshihiro ; Izumi, Shintaro ; Yoshimoto, Masahiko ; Kawaguchi, Hiroshi

  • Author_Institution
    Kobe Univ., Kobe, Japan
  • fYear
    2014
  • Firstpage
    223
  • Lastpage
    226
  • Abstract
    We present an I/O-sized second-order analog to digital converter (ADC) combined with a time-to-digital converter (TDC) and a voltage-to-time converter (VTC). Our proposed VTC is optimized for metal-oxide-metal (MOM) capacitances, and is charged to the MOM capacitances by an input voltage. In a standard 65-nm CMOS process, an SNR of 50 dB (8 bits) is achievable at an input signal frequency of 78 kHz and a sampling rate of 20 MHz, where the respective area and power are 6468 mm2 and 509 μW. The active area of the proposed ADC is smaller than an I/O buffer. The proposed ADC is useful as an ADC I/O.
  • Keywords
    CMOS integrated circuits; time-digital conversion; I-O buffer; I-O-sized ADC; MOM capacitor voltage-to-time converter; VTC; analog to digital converter; frequency 78 kHz; metal-oxide-metal capacitances; power 509 muW; second-order TDC; size 65 nm; standard CMOS process; time-to-digital converter; word length 8 bit; CMOS integrated circuits; Capacitance; Digital signal processing; Inverters; Method of moments; Switching circuits; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/ICECS.2014.7049962
  • Filename
    7049962