Title :
LNA circuit design counting the interconnect line parasitics
Author :
Hamani, Rachid ; Andrei, Cristian ; Jarry, Bernard ; Lintignat, Mien
Author_Institution :
NXP Semicond., Colombelles, France
Abstract :
This paper, presents a 24GHz Amplifier circuit demonstrator designed and fabricated in 0.25μm BiCMOS mature technology from NXP Semiconductors in order to evaluate the effect of the interconnect lines on impedance matching. It features 11 dB of gain, 7.6 dB of noise figure (NF) at the working frequency. The input/output impedances are matched close to 50 Ohm with an input return loss of-12 dB and output return loss of about -13 dB. The matching methodology is improved by considering the interconnect lines (from the Layout view) in the matching networks. Schematic circuit simulations and measurements are used to evaluate the amplifier circuit performances. The results are presented here and show a good agreement between both, measurements and simulations.
Keywords :
BiCMOS analogue integrated circuits; bipolar MMIC; circuit simulation; impedance matching; integrated circuit design; integrated circuit interconnections; low noise amplifiers; performance evaluation; BiCMOS mature technology; LNA circuit design; NXP semiconductors; amplifier circuit demonstrator; frequency 24 GHz; impedance matching; input impedance; interconnect line parasitics; low noise amplifier; matching networks; output impedance; performance evaluation; schematic circuit simulations; size 0.25 mum; Frequency measurement; Impedance matching; Inductors; Integrated circuit interconnections; Integrated circuit modeling; Semiconductor device measurement; Transistors; Interconnect lines; Low noise amplifier; Microwave band; Octagonal inductors; S-parameters;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on
DOI :
10.1109/ICECS.2014.7049994
