Optimal programming with voltage-controlled temperature profile to reduce SET state distribution dispersion in PCM

Phase-Change Memory (PCM) is the most mature among back-end emerging memory technologies and a likely candidate for the next generation of non-volatile memories. This paper presents an innovative programming technique for the Low-Resistance State (LRS) in PCM. The technique consists of an appropriately shaped electrical pulse, capable of controlling the power provided to the memory cell in order to enable a linear decrease of the temperature of the cell. The pulse can minimize the distribution dispersion of the LRS, while the pulse falling slope can be externally trimmed to match the crystallization requirements of any material under study. The model of a circuit able to generate the pulse is proposed. Finally, the schematic of a fabricated board with discrete components is presented and experimental results are provided in order to prove the functionality of the system.