DocumentCode :
3568986
Title :
A methodology to develop integrated circuits from Estelle specifications
Author :
Pirmez, Luci ; Carneiro, Fabio Contarini ; Pedroza, A.C.P. ; de Mesquita, Antonio Carneiro
Author_Institution :
COPPE, Univ. Federal do Rio de Janeiro, Brazil
Volume :
1
fYear :
1995
Firstpage :
19
Abstract :
A methodology that efficiently transforms Estelle specifications into VHDL descriptions, so that later on integrated circuits can be easily created, is presented. The methodology is based on the silicon compilation technique and its aim is to implement an integrated circuit from a specification in VHDL. Simulation results in Estelle and in VHDL languages are discussed
Keywords :
VLSI; circuit analysis computing; circuit layout CAD; hardware description languages; integrated circuit design; Estelle specifications; IC design; VHDL descriptions; VHDL specification; VLSI; silicon compilation techniqu; simulation results; Circuit simulation; Costs; Electronic mail; Hardware; Integrated circuit reliability; Integrated circuit technology; Protocols; Silicon; Telecommunication network reliability; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Print_ISBN :
0-7803-2972-4
Type :
conf
DOI :
10.1109/MWSCAS.1995.504368
Filename :
504368
Link To Document :
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