• DocumentCode
    3569121
  • Title

    A functional-level testability evaluation using a new M-testability approach

  • Author

    Jamoussi, M. ; Kaminska, Bozena

  • Author_Institution
    Ecole Polytechnique Montreal
  • fYear
    1993
  • Firstpage
    1611
  • Lastpage
    1614
  • Keywords
    Circuit testing; Costs; High level synthesis; Integrated circuit testing; Large scale integration; Logic arrays; Logic circuits; Logic design; Logic testing; Process design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • Filename
    692972
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3569121