Title :
A performance-driven approach to the high-level synthesis of DSP algorithms
Author :
Miyanaga, Yoshikazu ; Tochinai, K.
Keywords :
Algorithm design and analysis; Delay; Design optimization; Digital signal processing; High level synthesis; Processor scheduling; Registers; Signal design; Signal processing algorithms; Throughput;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Print_ISBN :
0-7803-1281-3
