DocumentCode
3569484
Title
A performance-driven approach to the high-level synthesis of DSP algorithms
Author
Miyanaga, Yoshikazu ; Tochinai, K.
fYear
1993
Firstpage
1658
Lastpage
1661
Keywords
Algorithm design and analysis; Delay; Design optimization; Digital signal processing; High level synthesis; Processor scheduling; Registers; Signal design; Signal processing algorithms; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Print_ISBN
0-7803-1281-3
Type
conf
Filename
692984
Link To Document