Title :
Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime
Author :
Hao Qiu ; Mizutani, Tomoko ; Yamamoto, Yoshiki ; Makiyama, Hideki ; Yamashita, Tomohiro ; Oda, Hidekazu ; Kamohara, Shiro ; Sugii, Nobuyuki ; Saraya, Takuya ; Kobayashi, Masaharu ; Hiramoto, Toshiro
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
Abstract :
The effect of random telegraph noise (RTN) on write stability of SRAM cells in sub-0.4V operation is intensively measured and statistically analyzed. RTN of N-curves in Silicon-on-Thin-BOX (SOTB) cells is monitored. By developing statistical models, it is found that, different from bulk SRAM cells operating at high supply voltage (VDD), fail bit rate (FBR) at sub-0.4V is degraded by RTN. The origin of high FBR due to RTN at sub-0.4V is discussed.
Keywords :
SRAM chips; buried layers; circuit stability; elemental semiconductors; integrated circuit noise; integrated circuit reliability; silicon; SOTB; Si; bulk SRAM cell; random telegraph noise; silicon-on-thin-BOX SRAM cells; write stability; Circuit stability; Current measurement; Fluctuations; Gaussian distribution; SRAM cells; Stability analysis;
Conference_Titel :
VLSI Technology (VLSI Technology), 2015 Symposium on
DOI :
10.1109/VLSIT.2015.7223694
