A new floorplan simultaneously placing blocks over two logic layers for sea-of-gate gate arrays

Author

Seki, Morihiro ; Kobayashi, S. ; Takubo, M. ; Kurosawa, K.

Author_Institution

Hitachi Ltd.

fYear

1993

Firstpage

1758

Lastpage

1761

Keywords

Bismuth; Delay; Large-scale systems; Logic arrays; Nonhomogeneous media; Routing; Shape; Simulated annealing; Timing; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Print_ISBN

0-7803-1281-3

Type

Filename

693009

Link To Document