• DocumentCode
    3571356
  • Title

    Accelerating OLAP Workload on Interconnected FPGAs with Flash Storage

  • Author

    Yoshimi, Masato ; Kudo, Ryu ; Oge, Yasin ; Terada, Yuta ; Irie, Hidetsugu ; Yoshinaga, Tsutomu

  • Author_Institution
    Grad. Sch. of Inf. Syst., Univ. of Electro-Commun., Chofu, Japan
  • fYear
    2014
  • Firstpage
    440
  • Lastpage
    446
  • Abstract
    The data volume used in online analytical processing (OLAP) applications is rapidly increasing because of the increasing popularity of various Web services and emerging sensor technologies. Since the amount of accumulated data is frequently too large to store in an in-memory database, it is necessary to have a secondary storage to store such big data. On the basis of this premise, the most important factor to determine the performance of data-intensive applications is to reduce the number and the size of the data transfers between the secondary storage and the main memory. To achieve an energy-efficient computing environment, offloading a user-defined function (UDF) onto interconnected FPGA-boards that equip high-speed storage is effective due to FPGA´s performance ratio of operations per I/O. In this paper, we focus on the aggregate operations that are popularly used UDF in OLAP, and propose an acceleration scheme utilizing interconnected FPGAs with flash storage. The scheme is by introducing an accelerator modules which apply operations to data-stream passing through the FPGA, in addition to appropriate data distribution and partitioning. We implemented an accelerator module that aggregates the data transferred from the flash storage to the DRAM in order to show availability. Through preliminary evaluations of the accelerator, we confirmed that aggregate operations supported by the active-disk mechanism outperforms a software-based database management system by more than 30 times.
  • Keywords
    Big Data; DRAM chips; Web services; data mining; database management systems; energy conservation; field programmable gate arrays; flash memories; sensors; Big Data; DRAM; FPGA performance ratio; OLAP workload acceleration; UDF; Web services; accelerator modules; active-disk mechanism; aggregate operations; data distribution; data partitioning; data transfers; data-intensive applications; data-stream; energy-efficient computing environment; flash storage; high-speed storage; in-memory database; interconnected FPGA board; main memory; online analytical processing; secondary storage; sensor technologies; software-based database management system; user-defined function; Acceleration; Aggregates; Ash; Field programmable gate arrays; Hardware; Random access memory; Registers; Aggregate Operation; Interconnected FPGA boards; OLAP; Online Analytical Processing; Tightly-coupled Accelerator;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computing and Networking (CANDAR), 2014 Second International Symposium on
  • Type

    conf

  • DOI
    10.1109/CANDAR.2014.87
  • Filename
    7052223