DocumentCode :
3571357
Title :
An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA
Author :
Xin Zhou ; Ito, Yasuaki ; Nakano, Koji
Author_Institution :
Dept. of Inf. Eng., Hiroshima Univ., Higashi-Hiroshima, Japan
fYear :
2014
Firstpage :
447
Lastpage :
452
Abstract :
The main contribution of this paper is to present an efficient implementation of the Hough transform algorithm that uses only one-dimensional parameter spaces for circles detection on a Xilinx Virtex-7 FPGA. We implemented the circuit using 398 DSP48E1 slices and 309 block RAMs with 18Kbits. The experimental results show that the architecture runs in 181.812MHz. For an edge image of size 400 × 400, our circuit can perform in at most 970434 clock cycles, i.e., 5337.568μs. Our implementation attains a speed-up factor of approximately 189 over the sequential implementation on the CPU.
Keywords :
Hough transforms; digital signal processing chips; field programmable gate arrays; random-access storage; 398 DSP48E1 slice; CPU; FPGA; Xilinx Virtex-7; block RAM; central processing unit; circle detection; clock cycles; edge image; field programmable gate array; frequency 181.812 MHz; one-dimensional Hough transform algorithm; random access memory; speed-up factor; Clocks; Computer architecture; Field programmable gate arrays; Image edge detection; Random access memory; Registers; Transforms; Circles detection; Edge image; Embedded DSP slices; Embedded block RAMs; FPGA; Hough transform;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing and Networking (CANDAR), 2014 Second International Symposium on
Type :
conf
DOI :
10.1109/CANDAR.2014.32
Filename :
7052224
Link To Document :
بازگشت