A new three phase reduced switch multilevel dc-link inverter for medium voltage applications

Multilevel inverters (MLIs) have developed into a potential prospect for medium voltage applications as they produce the output voltage derived from several isolated dc sources or capacitor banks in small steps. However, they suffer from major problems including higher number of capacitors, isolated dc sources, gate drivers and control complexity while increasing number of voltage levels. This paper uncovers a new three-phase multilevel dc- link inverter topology overwhelming the above mentioned problems. The proposed topology is designed for a seven level output and simulated in Matlab/Simulink using Multicarrier Pulse Width Modulation (MCPWM). The hardware results are depicted to show the feasibility of the proposed MLI for medium voltage applications.