Title :
Security and Performance Optimization of a new DES data encryption chip
Author :
Verbauwhede, I. ; Hoornaert, F. ; Vandewalle, J. ; De Man, H.
Author_Institution :
IMEC v.z.w., Kapeldreef 75, B-3030 Heverlee, Belgium; ESAT, K.U.Leuven, K. Mercierlaan 94, B-3030 Heverlee, Belgium. Tel: 32-(0)16-281211, 32-(0)16-220931
Abstract :
Cryptographical applications demand for high speed and high security. This paper describes the progress in the design and the implementation of a new powerful DES chip. The design methodology and the use of CAD tools at the different design steps is explained. The result is a single chip of 25 mm2 in 3 ¿ double metal CMOS that combines the DES algorithm with a number of unique security features. Functionality tests show that a 20 Mbit/sec datarate is achieved for all 8 bytes modes with a 16 Mhz clock.
Keywords :
Cryptography; Data security; Feedback; Hardware; Optimization; Partitioning algorithms; Pipelines; Registers; Routing; Testing;
Conference_Titel :
Solid-state Circuits Conference, 1987. ESSCIRC '87. 13th European
