DocumentCode
3571986
Title
A Single Chip Integrated Circuit Regenerator Capable of Operation in the Range 2-320 Mbit/s
Author
Faulkner, D.W. ; Hawkins, R J
Author_Institution
British Telecom Research Laboratories, Martlesham Heath, Ipswich, Suffolk, UK
fYear
1981
Firstpage
211
Lastpage
213
Abstract
A single chip regenerator has been developed solely within BTRL using a highly reliable silicon IC process. The prototype circuit is capable of operation over the entire span of currently agreed CCITT hierarchical levels from 2 to 140 Mbit/s, with extension to 280 Mbit/s for optical submarine applications.
Keywords
Circuits; Clocks; Filters; Frequency; Gain; Master-slave; Rectifiers; Repeaters; Resistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 1981. ESSCIRC '81. 7th European
Print_ISBN
3800712385
Type
conf
Filename
5435027
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