Title : 
Circuit Technique and Technology of Sub-Nanosecond LSI
         
        
            Author : 
Wilhelm, W. ; Berbalk, B. ; Unger, B. ; Graul, J. ; Kaiser, H.
         
        
            Author_Institution : 
SIEMENS AG, D Dv WS TE SS 143, Hofmannstr. 51 8000 Munich 70, Germany FRG
         
        
        
        
        
            Abstract : 
Various power-saving circuit techniques, associated with modern bipolar technology, will be discussed for application in subnanosecond LSI. As a result of this investigation, a masterslice LSI with up to 650 gate functions is presented.
         
        
            Keywords : 
Delay effects; Integrated circuit technology; Large scale integration; Logic arrays; Logic circuits; Parasitic capacitance; Signal to noise ratio; Switches; Switching circuits; Tellurium;
         
        
        
        
            Conference_Titel : 
Solid State Circuits Conference, 1977. ESSCIRC '77. 3rd European