VLSI-Compatible Stress-Annealing in Doped Silicon Films

Author

Scheiter, T. ; Biebl, M. ; Hierold, C. ; Klose, H.

Author_Institution

Siemens AG, Corporate Research, Otto-Hahn-Ring 6, 81739 M?ƒ??nchen, FRG; Lehrstuhl f?ƒ??r Integrierte Schaltungen, TU M?ƒ??nchen, Gabelsbergerstr. 51, 80444 M?ƒ??nchen, FRG

fYear

1994

Firstpage

399

Lastpage

402

Abstract

We present Rapid Thermal Annealing (RTA) as a VLSI-compatible method for the reduction of mechanical stress in doped Silicon films. Film stress is evaluated by measuring the difference in curvature of unstructured wafers before and after Si film removal. Results are presented for Boron and Arsenic doped films deposited as amorphous and polycristalline layers respectively. Thermal budgets necessary to achieve low stress Silicon films could be reduced by a factor of 100 compared to conventional furnace processing.

Keywords

Amorphous materials; Boron; Compressive stress; Rapid thermal annealing; Residual stresses; Semiconductor films; Silicon; Stress measurement; Temperature; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 1994. ESSDERC '94. 24th European

Print_ISBN

863321579

Type

conf

Filename

5435745

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3573163