• DocumentCode
    3573452
  • Title

    Rapid prototyping of DSP chip-sets via functional reuse

  • Author

    Romdhane, M.S.B. ; Madisetti, Vijay K.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    2
  • fYear
    1996
  • Firstpage
    1236
  • Abstract
    This paper proposes a novel design methodology and environment for digital signal processing application-specific integrated circuits (DSP-ASICs). The design methodology is based on systematic functional reuse. A library defines basic functional blocks that are automatically reused over multiple DSP applications. The defined design approach is utilized to rapidly prototype high performance DSP applications. A comparison with conventional ASIC and FPGA design, shows that the proposed approach bridges the gap between ASICs and FPGAs by offering high performance, low cost, and a short time-to-market
  • Keywords
    application specific integrated circuits; circuit CAD; costing; digital signal processing chips; field programmable gate arrays; hardware description languages; integrated circuit design; performance evaluation; ASIC; DSP chip-sets; FPGA design; VHDL; application-specific integrated circuits; design methodology; digital signal processing chips; functional blocks; functional reuse; high performance; high performance DSP applications; low cost; rapid prototyping; time-to-market; Application specific integrated circuits; Bridge circuits; Costs; Design methodology; Digital signal processing; Digital signal processing chips; Field programmable gate arrays; Prototypes; Software libraries; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, 1996. ICASSP-96. Conference Proceedings., 1996 IEEE International Conference on
  • ISSN
    1520-6149
  • Print_ISBN
    0-7803-3192-3
  • Type

    conf

  • DOI
    10.1109/ICASSP.1996.543590
  • Filename
    543590