DocumentCode :
3573467
Title :
Modelling of Impact Ionization Current for LDD SOI MOSFETs
Author :
Pidin, S. ; Matsumoto, T. ; Terao, N. ; Koyanagi, M.
Author_Institution :
Department of Machine Intelligence and System Engineering, Faculty of Engineering, Tohoku University, Aramaki, Aoba-ku, Sendai 980-77, Japan
fYear :
1995
Firstpage :
393
Lastpage :
396
Abstract :
The impact ionization phenomenon in submicron LDD SOI MOSFETs is investigated using devices with body terminals. It is shown that in order to accurately model the impact ionization current for submicron LDD SOI MOSFETs, it is necessary to account for the voltage drop on the parasitic source-and-drain series resistances and for the gate-voltage dependent saturation field in the expression for the maximum channel electric field Em. It is demonstrated that the plot of IIMP/(IDEm) versus 1/Em is a single straight line for a given technology. In addition, method to extract the effective length of the saturation region is developed and extrapolation for shorter channel length devices is made.
Keywords :
CMOS technology; Current measurement; Degradation; Extrapolation; Impact ionization; MOSFETs; Machine intelligence; Semiconductor device modeling; Systems engineering and theory; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1995. ESSDERC '95. Proceedings of the 25th European
Print_ISBN :
286332182X
Type :
conf
Filename :
5435912
Link To Document :
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