The analysis and design of ternary paralleled high power electronic load

In traditional test, it is difficult for static loads which we usually use to regulate the current output of power supply continuously. Furthermore, its feature will change after long time testing. Therefore, this paper presented a new interleaved circuit topology. This topology and its interleaved trigger strategy were able to realize high power and high frequency DC electronic loads. Meanwhile, this topology also could reduce the volume of passive device effectively. This paper demonstrated the work mode and the small-signal model of new E-load in order to obtain its mathematical expression under system steady state. Classical control theory also has been employed to verify the stability of new E-load system. Based on the topology we presented and PI controller, we accomplished a unique E-load which can be exercised even though power supply current output was changing continuously. To verify the effectiveness of the system, an experimental platform has been established based on TMS320F2812 DSP and the experimental results suggested that our E-load met the requirement we anticipated.