DocumentCode :
3573646
Title :
Capacitance Modeling for Deep Submicron Thin Gate Oxide MOSFETs
Author :
Arora, Narain D. ; Rios, Rafael ; Antoniadis, Dimitri A.
Author_Institution :
Digital Equipment Corporation, Hudson, MA, 01749 USA.
fYear :
1995
Firstpage :
569
Lastpage :
572
Abstract :
In this paper we report a physically based thin gate oxide MOSEET model for ULSI circuit simulations. It is shown that to accurately model current and capacitances in these devices down to 0.1¿m channel length, one must use effective gate oxide thickness that is larger than the physical thickness in the classical MOSFET circuit models. The increase in the effective Tox from its physical value depends upon physical value of Tox and channel doping. Although effective value of Tox is bias dependent, a bias independent value is sufficient to use for circuit models. The advantage of using a physical Tox is that the statistical variation in the process during the chip design cycle can easily be taken into account.
Keywords :
Capacitance; Chip scale packaging; Circuit simulation; Doping; Equations; MOSFET circuits; SPICE; Semiconductor process modeling; Threshold voltage; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1995. ESSDERC '95. Proceedings of the 25th European
Print_ISBN :
286332182X
Type :
conf
Filename :
5436051
Link To Document :
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