Simulation of a transistor clamped H-bridge multilevel inverter and its comparison with a conventional H-bridge multilevel inverter

Double reference single carrier modulation technique is a new technique employed for generating pulses for multilevel inverters. This paper presents a simulation of a transistor clamped H-bridge multilevel inverter using double reference single carrier modulation technique. Using the modulation technique, output voltage, output current and voltage stress across the switches of the transistor clamped multilevel inverter is obtained. The total harmonic distortion obtained for different values of the modulation index is presented. Further, the paper aims to perform a comparison of a transistor clamped H-Bridge multilevel inverter with a conventional cascaded H-Bridge multilevel inverter. The comparison is done with respect to complexity of the circuit topologies and total harmonic distortion obtained with both the multilevel inverters. Results are obtained using simulations done in MATLAB Simulink environment.