Title :
Application of side-wall deposition and etch-back technology for nanometer scale device integration
Author :
Hilleringmann, U. ; Vidor, F.F. ; Assion, F.
Author_Institution :
Fac. of Comput. Sci., Electr. Eng. & Math., Univ. of Paderborn, Paderborn, Germany
Abstract :
The side-wall deposition and etch-back technology is a simple method to produce nanometer scale lines and trenches or gaps. It can be used in semiconductor technology for electronic device integration. This paper reflects its application for field effect transistors in bulk silicon and demonstrates its potential for nanometer scale particle transistor integration. Silicon and ZnO nanoparticle field effect transistors using different setup structures show on/off ratios of up to 4500 and mobilities of some cm2V·1s-1. Although the best structures apply high temperature processing, a reduced temperature process for ZnO nanoparticle transistor integration on glass and foil substrates is presented.
Keywords :
coating techniques; etching; field effect transistors; foils; glass; high-temperature techniques; isolation technology; nanoelectronics; nanoparticles; semiconductor device manufacture; silicon; zinc compounds; Si; ZnO; bulk silicon; electronic device integration; etch-back technology; foil substrates; glass; high temperature processing; nanometer scale device integration; nanometer scale lines; nanometer scale particle transistor integration; nanoparticle field effect transistors; nanoparticle transistor integration; reduced temperature process; semiconductor technology; side-wall deposition; Field effect transistors; Films; Nanoscale devices; Silicon; Substrates; Zinc oxide; ZnO; deposition defined structures; nano particle transistor; nanoparticle; nanoscale trench;
Conference_Titel :
Science, Computing and Telecommunications (PACT), 2014 Pan African Conference on
DOI :
10.1109/SCAT.2014.7055128