targetDP: an Abstraction of Lattice Based Parallelism with Portable Performance

To achieve high performance on modern computers,it is vital to map algorithmic parallelism to that inherent inthe hardware. From an application developer´s perspective, itis also important that code can be maintained in a portablemanner across a range of hardware. Here we present targetDP(target Data Parallel), a lightweight programming layer thatallows the abstraction of data parallelism for applications thatemploy structured grids. A single source code may be used totarget both thread level parallelism (TLP) and instruction levelparallelism (ILP) on either SIMD multi-core CPUs or GPUacceleratedplatforms. targetDP is implemented via standard Cpreprocessor macros and library functions, can be added toexisting applications incrementally, and can be combined withhigher-level paradigms such as MPI. We present CPU and GPUperformance results for a benchmark taken from the latticeBoltzmann application that motivated this work. These demonstratenot only performance portability, but also the optimisationresulting from the intelligent exposure of ILP.