DocumentCode
3575073
Title
Leveraging Hierarchical Data Locality in Parallel Programming Models
Author
Anbar, Ahmad ; Kayraklioglu, Engin ; Serres, Olivier ; El Ghazawi, Tarek
Author_Institution
Dept. of Electr. & Comput. Eng., George Washington Univ., Washington, DC, USA
fYear
2014
Firstpage
363
Lastpage
366
Abstract
We are proposing a novel framework that ameliorates locality-aware parallel programming models, by defining hierarchical data locality model extension. We also propose a hierarchical thread partitioning algorithm. This algorithm synthesizes hierarchical thread placement layouts that targets minimizing the program´s overall communication costs. We demonstrated the effectiveness of our approach using NAS Parallel Benchmarks implemented in Unified Parallel C (UPC) language using a modified Berkeley UPC Compiler and runtime system. We demonstrated an up to 85% improvement in performance by applying the placement layout suggested by our algorithm.
Keywords
C language; mobile computing; multi-threading; parallel languages; program compilers; NAS Parallel Benchmarks; UPC language; Unified C language; communication costs; hierarchical data locality model extension; hierarchical thread partitioning algorithm; hierarchical thread placement layouts; locality-aware parallel programming model; modified Berkeley UPC compiler; runtime system; Benchmark testing; Data models; Kernel; Measurement; Message systems; Partitioning algorithms; Runtime; Data locality; Hierarchical thread clustering; Many-cores;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS), 2014 IEEE Intl Conf on
Print_ISBN
978-1-4799-6122-1
Type
conf
DOI
10.1109/HPCC.2014.62
Filename
7056766
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