DocumentCode :
3576090
Title :
Design of CMOS instrumentation amplifier using gm/ID methodology
Author :
Eswaran, Deepan ; Devi, J. Dhurga ; Ramakrishna, P.V.
Author_Institution :
Dept. of Electron. & Commun. Eng., Anna Univ., Chennai, India
fYear :
2014
Firstpage :
29
Lastpage :
32
Abstract :
This paper describes the design of an indirect current feedback Instrumentation Amplifier (IA). Transistor sizing plays a major role in achieving the desired gain, the Common Mode Rejection Ratio (CMRR) and the bandwidth of the Instrumentation Amplifier. A gm/ID based design methodology is employed to design the functional blocks of the IA. It links the design variables of each functional block to its target specifications and is used to develop design charts that are used to accurately size the transistors. The IA thus designed achieves a voltage gain of 31dB with a bandwidth 1.2MHz and a CMRR of 87dB at 1MHz. The circuit design is carried out using 0.18μm CMOS process.
Keywords :
CMOS analogue integrated circuits; MOSFET; instrumentation amplifiers; integrated circuit design; radiofrequency integrated circuits; CMOS instrumentation amplifier; CMRR; IA; bandwidth 1.2 MHz; common mode rejection ratio; frequency 1 MHz; gm-ID methodology; gain 31 dB; indirect current feedback instrumentation amplifier; noise figure 87 dB; size 0.18 mum; transistor sizing; Bandwidth; CMOS integrated circuits; Gain; Instruments; Noise; Topology; Transistors; CMOS; Current Feedback Instrumentation Amplifier; gm/ID Methodology; high CMRR;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits, Communication, Control and Computing (I4C), 2014 International Conference on
Print_ISBN :
978-1-4799-6545-8
Type :
conf
DOI :
10.1109/CIMCA.2014.7057750
Filename :
7057750
Link To Document :
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