DocumentCode
3576242
Title
High performance multi-mode SRAM cells
Author
Rajani, H.P. ; Kulkarni, S.Y.
Author_Institution
Dept. of E&C, KLE Dr. MSS CET, Belgaum, India
fYear
2014
Firstpage
421
Lastpage
424
Abstract
New Multi-mode SRAM cells to suit applications with different power consumption during both active and sleep mode of states with data preservation requirements are discussed in this work. Proposed PSVG and MNSVP SRAM cells are capable of substantial reduction of leakage power resulting due to subthreshold leakage current and gate leakage current with good access timings.
Keywords
MOS memory circuits; SRAM chips; leakage currents; logic gates; MNSVP SRAM cells; PSVG SRAM cells; Pmos sleep transistor for virtual ground; active mode; data preservation requirements; gate leakage current; leakage power reduction; multimode Nmos sleep transistor for virtual power; multimode SRAM cells; power consumption; sleep mode; subthreshold leakage current; Electric potential; Leakage currents; Power dissipation; SRAM cells; Switching circuits; Transistors; Multi-mode SRAM; data preservation; subthreshold leakage current and gate leakage current;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits, Communication, Control and Computing (I4C), 2014 International Conference on
Print_ISBN
978-1-4799-6545-8
Type
conf
DOI
10.1109/CIMCA.2014.7057836
Filename
7057836
Link To Document