Title :
IC design validation using message sequence charts
Author :
Vranken, Harald ; Garciá, Tomás Garciá ; Mauw, Sjouke ; Feils, L.
Author_Institution :
Philips Res. Lab., IC Design-Digital Design & Test, Eindhoven, Netherlands
Abstract :
The authors describe a design validation method based on simulation of behavioral models, in which Message Sequence Charts (MSC) are used to visualize the simulation results and to aid in debugging. Thereto, we have extended a Philips proprietary tool, called TSS (Tool for System Simulation), with the possibility to visualize simulation traces
Keywords :
circuit simulation; data visualisation; digital simulation; integrated circuit design; visual languages; IC design validation; Philips proprietary tool; TSS; Tool for System Simulation; behavioral model simulation; debugging; design validation method; message sequence charts; simulation result visualization; simulation traces; Computational modeling; Debugging; Design methodology; Digital integrated circuits; Embedded system; Integrated circuit modeling; Integrated circuit testing; Laboratories; Mathematics; Visualization;
Conference_Titel :
Euromicro Conference, 2000. Proceedings of the 26th
Conference_Location :
Maastricht
Print_ISBN :
0-7695-0780-8
DOI :
10.1109/EURMIC.2000.874624
