• DocumentCode
    357655
  • Title

    A new method of redundancy addition for circuit optimization

  • Author

    Ocheretnij, V. ; Saposhnikov, V. ; Saposhnikov, V. ; Goessel, M.

  • Author_Institution
    Dept. of Comput., Potsdam Univ., Germany
  • Volume
    1
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    172
  • Abstract
    A new method for the optimization of combinational circuits by the addition of redundancy is investigated. In the first step, the original circuit is modified by adding, modulo 2, carefully selected input variables to a subset of the circuit outputs, and the modified circuit is optimized by the SIS tool for sequential circuit synthesis. Then the same input variables are added modulo-2 a second time to the corresponding outputs to restore the functionality of the original circuit. The proposed method results in an average area reduction of 4.1% with respect to the optimized original circuit
  • Keywords
    circuit optimisation; combinational circuits; redundancy; circuit area reduction; circuit functionality restoration; circuit optimization; circuit output subset; combinational circuits; input variables; modulo arithmetic; redundancy addition; Boolean functions; Circuit optimization; Circuit synthesis; Computer science; Fault tolerance; Input variables; Optimization methods; Optimized production technology; Rail transportation; Redundancy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Euromicro Conference, 2000. Proceedings of the 26th
  • Conference_Location
    Maastricht
  • ISSN
    1089-6503
  • Print_ISBN
    0-7695-0780-8
  • Type

    conf

  • DOI
    10.1109/EURMIC.2000.874630
  • Filename
    874630