Title :
ECC with increased hard error correction capability for memory reliability improvement
Author_Institution :
IHP, Frankfurt (Oder), Germany
Abstract :
Emerging non-volatile memories such as PCRAMs, MRAMs/STT-MRAMs, FRAMs, and RRAMs are promising candidates for embedded memories in upcoming digital systems. Due to their non-volatility, low-power consumption, and scalability potential, they are best suited in applications like smartphones, tablets, wearable electronics, and sensor nodes. Unfortunately, despite all advantages they offer, emerging non-volatile memories pose some peculiar characteristics like limited endurance and/or variable data retention time. This paper proposes repair mechanism based on a well-known SEC-DED code which can significantly increase the reliability of embedded non-volatile memories.
Keywords :
error correction; integrated circuit reliability; low-power electronics; maintenance engineering; random-access storage; ECC; FRAM; PCRAM; RRAM; SEC-DED code; STT-MRAM; digital systems; embedded nonvolatile memories; hard error correction capability; low-power consumption; memory reliability improvement; repair mechanism; scalability potential; sensor nodes; smartphones; tablets; variable data retention time; wearable electronics; Decoding; Error correction codes; Maintenance engineering; Memory management; Nonvolatile memory; Random access memory; Reliability;
Conference_Titel :
Non-Volatile Memory Technology Symposium (NVMTS), 2014 14th Annual
Print_ISBN :
978-1-4799-4203-9
DOI :
10.1109/NVMTS.2014.7060856
