Title :
A 13-mW 0.22-mm2 continuous-time Delta-Sigma ADC with 68-dB dynamic range in 10-MHz bandwidth
Author :
Ken Xu ; Min Cai
Author_Institution :
Sch. of Electron. & Inf. Eng., South China Univ. of Technol., Guangzhou, China
Abstract :
This paper presents a 3rd-order continuous-time (CT) Delta-Sigma modulator (DSM) for broadband digital transceivers. In this design, a low-cost Proportional-Integrating (PI) element Excess Loop Delay (ELD) compensation method is adopted to mitigate the influence of ELD. Meanwhile, to avoid the compensation zero and loop filter coefficients variation due to process variation, an on-chip automatic RC constant tuning block is used to trim the RC constant. The proposed DSM is fabricated in a 0.13 um 1P6M CMOS technology and occupies an active area of 0.22 mm2. It achieves 68 dB dynamic range (DR), 66 dB peak signal to noise plus distortion ratio (SNDR) in 10 MHz bandwidth under 500MHz sampling frequency and dissipates 13 mW power under 1.5 V power supply.
Keywords :
CMOS integrated circuits; RC circuits; analogue-digital conversion; circuit tuning; compensation; delta-sigma modulation; radiofrequency filters; radiofrequency integrated circuits; 1P6M CMOS technology; 3rd-order CT DSM; 3rd-order continuous-time delta-sigma modulator; ELD compensation method; PI element; SNDR; bandwidth 10 MHz; broadband digital transceiver; continuous-time delta-sigma ADC; excess loop delay compensation method; gain 68 dB; loop filter coefficient; noise figure 66 dB; on-chip automatic RC constant tuning block; power 13 mW; proportional-integrating element; signal to noise plus distortion ratio; size 0.13 mum; voltage 1.5 V; Bandwidth; Broadband communication; Clocks; Delays; Modulation; Transceivers; Tuning; Delta-Sigma Modulator (DSM); Excess Loop Delay (ELD); RC constant variation;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061077
