• DocumentCode
    3578029
  • Title

    A gate-stress-induced ΔVth model reflecting impact of electric field in IGZO thin film transistors

  • Author

    Cai, Yuying ; Wang, Lisa Ling ; Shengdong Zhang

  • Author_Institution
    Sch. of Electron. & Comput. Eng., Peking Univ., Shenzhen, China
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    The modeling study of gate-bias-stress-induced threshold voltage shift (ΔVth) in amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistors (TFTs) is reported. According to the total number of tunneled carriers and the probability in tunneling, saturated ΔVth is obtained, and the impact of electric field in gate insulator on the ΔVth is also incorporated in this model. The result shows that the model is able to predict the ΔVth of IGZO TFT under a positive gate stress. The dependence of the ΔVth on the initial conditions is also analyzed in this paper.
  • Keywords
    amorphous semiconductors; electric field effects; indium compounds; semiconductor device models; thin film transistors; tunnelling; InGaZnO; amorphous thin film transistor; electric field impact; gate bias stress induced threshold voltage shift; tunneled carrier; tunneling probability; Logic gates; TFT; electric field; model; threshold voltage shift; tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/EDSSC.2014.7061105
  • Filename
    7061105
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3578029