A GPS SOC with novel fast auto frequency calibration RF PLL

Author

Zhijian Chen ; Min Cai

Author_Institution

Nat. Eng. Technol. Res. Center for Mobile Ultrasonic Detection, South China Univ. of Technol., Guangzhou, China

fYear

2014

Firstpage

1

Lastpage

2

Abstract

A GPS SOC with auto frequency calibration PLL is designed to obtain fast PLL locking for GPS navigation. An analog and digital algorithm parts complete the whole auto frequency calibration circuits. This work is fabricated by 0.13 μm RF CMOS process, and demonstrating that the VCO frequency tuning range is wider than ±500MHz and the AFC completing time is less than 80us. The SOC acquisition and tracking sensitivity are about -142dBm and 155dBm.

Keywords

CMOS integrated circuits; Global Positioning System; calibration; integrated circuit design; phase locked loops; radiofrequency integrated circuits; system-on-chip; voltage-controlled oscillators; AFC completing time; GPS SOC; GPS navigation; Global Positioning System; RF CMOS process; SOC acquisition; VCO frequency tuning range; analog algorithm; autofrequency calibration RF PLL; autofrequency calibration circuits; digital algorithm; phase locked loops; size 0.13 mum; system-on-chip; tracking sensitivity; voltage-controlled oscillators; Navigation; Radio frequency; Receiving antennas; Surface acoustic waves; System-on-chip; Tuning; AFC; PLL; VCO; locking time;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on

Type

conf

DOI

10.1109/EDSSC.2014.7061136

Filename

7061136