A novel CML latch for ultra high speed applications

Author

Xuelin Zhang ; Yuan Wang ; Song Jia ; Ganggang Zhang ; Xing Zhang

Author_Institution

Key Lab. of Microelectron. Devices & Circuits (MoE), Peking Univ., Beijing, China

fYear

2014

Firstpage

1

Lastpage

2

Abstract

An ultra high speed current mode logic (CML) latch is proposed in this paper. The latch uses an NMOS transistor controlled by clock signal to improve the tail current of the latching branch, so as to improve the speed of the latch. In 0.13μm CMOS technology, the divide-by-four frequency divider composed of the proposed CML latch can work under the maximum frequency of 15.2GHz, which is almost the twice of the conventional CML latch. Simultaneously, the proposed CML latch consumes only 1.3% more power than the conventional one, realizing a good compromise between speed and power.

Keywords

CMOS logic circuits; MOSFET; current-mode logic; flip-flops; frequency dividers; microwave integrated circuits; CML latch; CMOS technology; NMOS transistor; current mode logic; divide-by-four frequency divider; frequency 15.2 GHz; size 0.13 mum; ultrahigh speed application; CMOS integrated circuits; CMOS technology; Clocks; Frequency conversion; Frequency division multiplexing; Latches; Simulation; CML latch; Current Mode Logic (CML); low power; ultra high speed;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on

Type

conf

DOI

10.1109/EDSSC.2014.7061189

Filename

7061189