Title :
A sub-1-V ultra-low power full CMOS bandgap reference woking in subthreshold region
Author :
Qing Ding ; Pengpeng Yuan ; Dongmei Li ; Zhihua Wang
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
A sub-1-V nanopower full CMOS bandgap voltage reference is implemented in standard 0.18-μm CMOS process in this paper. The active area occupies only 0.0094mm2. Moreover, low voltage and low power operation is achieved by utilizing weighted difference of two gate-source voltages (ΔVGS) created by a n-MOSFET pair with different gate oxide thickness, three current branches topology and self-cascode structure. Measured results of 20 samples show that it works properly for the supply voltage (VDD) from 0.8V to 2.5V. The output reference voltage (VREF) is 564±30mV with standard deviation(σ) being 11.2mV and measured Temperature Coefficient (TC) at best is 8ppm/°C with 15 ppm/°C on average. When supplied by 1V, the power dissipation of proposed bandgap reference is 52nW at 27°C.
Keywords :
CMOS integrated circuits; MOSFET; low-power electronics; active area; current branch topology; gate oxide thickness; gate-source voltage weighted difference; low-power operation; low-voltage operation; measured temperature coefficient; n-MOSFET pair; nanopower full-CMOS bandgap voltage reference; output reference voltage; power 52 nW; power dissipation; self-cascode structure; size 0.18 mum; standard CMOS process; standard deviation; subthreshold region; supply voltage; temperature 27 degC; ultralow-power full-CMOS bandgap reference; voltage 0.8 V to 2.5 V; voltage 11.2 mV; CMOS integrated circuits; Logic gates; Low voltage; MOSFET circuits; Photonic band gap; Temperature measurement;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061222