DocumentCode :
3578147
Title :
Design of high power supply rejection voltage reference with wide input voltage
Author :
Yuheng Han ; Guojun Zhang ; Shaomin Zhao ; Jun Guo ; Heping Luo
Author_Institution :
State Key Lab. of Elet. Thin Films & Integr. Dev., UESTC, Chengdu, China
fYear :
2014
Firstpage :
1
Lastpage :
2
Abstract :
This paper proposes a high power supply rejecttion (PSR) bandgap voltage reference using a CSMC 0.5um BCD process. The temperature coefficient of this circuit achieves 16.93~19.02 ppm/°C over a range of -40~125 °C when the input voltage is 4~36 V. Better PSR can be achieved since the potentials of critical nodes are not changed. The bandgap reference voltage is located in a negative feedback loop, which is suitable for the design of a high PSR reference. In addition to a wide input range, the methods used to improve the PSR also provide good line regulation. This voltage reference provides a PSR of -132dB~-98dB at dc and -54.7dB~-55.5dB at 1MHz, a line regulation of 0.009%/V with a supply voltage between 4 V and 36 V, which meets the requirements of dc-to-dc converter applications.
Keywords :
BIMOS integrated circuits; DC-DC power convertors; feedback; reference circuits; CSMC BCD process; DC-DC converter; PSR bandgap voltage reference; high power supply rejection bandgap voltage reference; line regulation; negative feedback loop; size 0.5 mum; temperature coefficient; voltage 4 V to 36 V; CMOS integrated circuits; Impedance; Layout; Photonic band gap; Power supplies; Temperature distribution; Voltage control; bandgap voltage reference; high power supply rejection; wide input range;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
Type :
conf
DOI :
10.1109/EDSSC.2014.7061223
Filename :
7061223
Link To Document :
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