Performance analysis of Tunnel Field Effect Transistor using charge plasma concept

In this paper, we have analyzed the impact of gate dielectric, device width, metal electrodes on Tunnel Field Effect Transistor (T-FET). A numerical TCAD device simulator 3-D ATLAS version 2.10.18.R shows that reducing the width can reduce the effective threshold voltage and applied voltages. Transistor with a high I_ON /I_OFF ratio of 10¹⁰ sub- threshold swing of 57 mV/decade for the channel length of 50 nm with Hafnium oxide as gate dielectric material. The performance analysis of Tunnel field effect transistor is done by taking doping less T-FET and taking tantalum as the drain electrode, gold as the source electrode and varying dielectric material, width of the device, applied voltages and metal contacts. The simulation results indicate the suitability of the proposed novel structure for replacing the conventional CMOS device.