Title :
Spatial correlation of conductive filaments for multiple switching cycles in CBRAM
Author :
Pey, K.L. ; Raghavan, N. ; Wu, X. ; Bosman, M. ; Xi-Xiang Zhang ; Kun Li
Author_Institution :
Eng. Product Dev., Singapore Univ. of Technol. & Design, Singapore, Singapore
Abstract :
Conducting bridge random access memory (CBRAM) is one of the potential technologies being considered for replacement of Flash memory for non-volatile data storage. CBRAM devices operate on the principle of nucleation and rupture of metallic filaments. One key concern for commercializing this technology is the question of variability which could arise due to nucleation of multiple filaments across the device at spatially different locations. The spatial spread of the filament location may cause long tails at the low and high percentile regions for the switching parameter distribution as the new filament that nucleates may have a completely different shape and size. It is therefore essential to probe whether switching in CBRAM occurs every time at the same filament location or whether there are other new filaments that could nucleate during repeated cycling with some spatial correlation (if any) to the original filament. To investigate this issue, we make use of a metal-insulator-semiconductor (M-I-S) transistor test structure with Ni as the top electrode and HfOx/SiOx as the dielectric stack. In-situ stressing using a nano-tip on the M-I-S stack is performed and the filament is imaged in real-time using a high resolution transmission electron microscope (TEM). We also extract the location of the filament (LFIL) along the channel of the transistor after the nucleation stage using the weighted proportion of the source and drain currents.
Keywords :
CMOS memory circuits; MIS devices; flash memories; integrated circuit testing; nucleation; random-access storage; transmission electron microscopes; CBRAM; conducting bridge random access memory; conductive filaments; dielectric stack; flash memory; high resolution transmission electron microscope; metal-insulator-semiconductor transistor test structure; metallic filaments; multiple switching cycles; nonvolatile data storage; nucleation; spatial correlation; switching parameter distribution; Correlation; Dielectrics; Nickel; Reliability; Silicon; Switches; Conducting bridge memory; Filament location; Metal filament; Nucleation; Rupture; Spatial correlation;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061251