Title :
A novel multilevel inverter topology with selective harmonic elimination technique
Author :
Rai, Manuj ; Tripathi, Ramesh Kumar
Author_Institution :
Electr. Dept., Motilal Nehru Nat. Inst. of Technol., Allahabad, India
Abstract :
The multilevel inverters are becoming highly popular in high power and medium voltage applications. This paper presents the method of reducing the THD in load current and voltage using a novel multilevel inverter topology. This novel topology uses less number of switches then the conventional multilevel inverters. The switching method used here is Selective Harmonic Elimination. A LC filter is used across the load to remove the higher order harmonics. The simulation is carried out for the 11 level multilevel inverter using the MATLAB/Simulink.
Keywords :
harmonic distortion; harmonics suppression; invertors; network topology; LC filter; THD reduction; higher order harmonic removal; load current; load voltage; multilevel inverter topology; selective harmonic elimination technique; Delays; Harmonic analysis; Inverters; Load modeling; Power harmonic filters; Switches; Topology; Fast Fourier Transform(FFI); Multilevel Inverter (MLI); Power Factor (P.F); Selective Harmonics Elimination (SHE); Total Harmonic Distortion (THD);
Conference_Titel :
Power, Control and Embedded Systems (ICPCES), 2014 International Conference on
Print_ISBN :
978-1-4799-5910-5
DOI :
10.1109/ICPCES.2014.7062832
