Title :
A digital background calibration algorithm of time-interleaved ADC
Author :
Yongsheng Yin ; Jiayu Li ; Hongmei Chen
Author_Institution :
Inst. of VLSI Design, Hefei Univ. of Technol., Hefei, China
Abstract :
This paper presents a background calibration algorithm based on the interpolation filter and the Least Mean Square (LMS) algorithm, taking the 5-channel Time-Interleaved Analog to Digital Converter(TIADC) as the model. And the algorithm is verified by the Simulink modeling and hardware. Comparing the spectra of the signals before and after calibration in the Simulink model, the ENOB rises from 3.62446 to 7.67697 and the SNR rises from 23.5815dB to 43.1738dB when the frequency of the input signal fin=29.8MHz While fin=59.8MHz, the ENOB rises from 3.62009 to 7.48092 and the SNR rises from 23.5552dB to 43.1929dB. Therefore, the correctness and the effectiveness of the algorithm have been verified.
Keywords :
analogue-digital conversion; calibration; filtering theory; least mean squares methods; 5-channel time-interleaved analog to digital converter; ENOB; Simulink modeling; TIADC; digital background calibration algorithm; interpolation filter; least mean square algorithm; time-interleaved ADC; Calibration; Clocks; Hardware; Interpolation; Least squares approximations; Mathematical model; Signal processing algorithms; Hardware; Interpolation Filter; LMS; TIADC;
Conference_Titel :
Anti-counterfeiting, Security, and Identification (ASID), 2014 International Conference on
Print_ISBN :
978-1-4799-7117-6
DOI :
10.1109/ICASID.2014.7064962
