• DocumentCode
    3580337
  • Title

    FPGA design for reflective memory network communication technology

  • Author

    Chen Yong ; Tang Xiaofeng ; Wang Yan ; Wu Wenbo

  • Author_Institution
    Bejing Oil Res. Inst., Beijing, China
  • fYear
    2014
  • Firstpage
    153
  • Lastpage
    157
  • Abstract
    On the hardware platform of Distributed Real-Time Simulation, a communication module based on reflective memory network was realized in FPGA. The module, as an infrastructure, could be integrated with others seamlessly. Information stream inside the module was analyzed. Following the "Store and Forward with FIFO" rules, hardware circuits were well designed, including Host Logic, Memory Logic, and Net Logic. In addition, kernel data structures were defined, and 64bits/32bits PCI bus compatibility problem was mainly solved. Finally, through the delay analysis of the design and experiments in field, the communication delay between two neighboring nodes reaches microsecond level.
  • Keywords
    data structures; field programmable gate arrays; logic design; peripheral interfaces; FPGA design; PCI bus compatibility problem; communication delay; communication module; delay analysis; distributed real-time simulation; hardware circuit design; hardware platform; host logic; information stream; kernel data structures; memory logic; microsecond level; neighboring nodes; net logic; reflective memory network; reflective memory network communication technology; store-forward-FIFO rules; Clocks; Data structures; Delays; Field programmable gate arrays; Hardware; Optical fiber networks; Real-time systems; FPGA; PCI compatibility; real-time communication; reflective memory network;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Technology and Artificial Intelligence Conference (ITAIC), 2014 IEEE 7th Joint International
  • Print_ISBN
    978-1-4799-4420-0
  • Type

    conf

  • DOI
    10.1109/ITAIC.2014.7065025
  • Filename
    7065025