DocumentCode :
3580623
Title :
An Efficient Approach to VLSI Circuit Partitioning Using Evolutionary Algorithms
Author :
Sangwan, Dhiraj ; Verma, Seema ; Kumar, Rajesh
Author_Institution :
CEERI, Pilani, India
fYear :
2014
Firstpage :
925
Lastpage :
929
Abstract :
Circuit Partitioning generally formulated as graph partitioning problem is an important step in physical design of circuits. The use of Evolutionary techniques is increasingly used to solve NP complete problems i.e. Applications for logic minimization and simulation heuristics. This paper explores the evolutionary approach of genetic algorithm and propose a hybrid technique involving the strengths of the existing techniques resulting in a better partitioning and placement of circuits. It can further be extended to the Hardware/Software boundary of algorithms and can be applied to real world physical design problems.
Keywords :
VLSI; circuit optimisation; computational complexity; genetic algorithms; integrated circuit design; NP complete problems; VLSI circuit partitioning; evolutionary algorithms; genetic algorithm; graph partitioning problem; hardware-software boundary; logic minimization; physical circuit design; simulation heuristics; Algorithm design and analysis; Genetic algorithms; Optimization; Partitioning algorithms; Sociology; Statistics; Very large scale integration; Algorithm; Circuit Partitioning; Evolutionary Algorithm; Fiduccia Mattheyses Algorithm; Kernighan Lin; VLSI; optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Communication Networks (CICN), 2014 International Conference on
Print_ISBN :
978-1-4799-6928-9
Type :
conf
DOI :
10.1109/CICN.2014.195
Filename :
7065615
Link To Document :
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