DocumentCode :
3580636
Title :
Proposal of Snubber Circuit to Reduce Problem of Collapsing in BJT due to Overrating
Author :
Vyas, Keerti ; Jain, Ginni ; Maurya, Vijendra K. ; Raman, Alwar
Author_Institution :
ECE Dept., GITS, Udaipur, India
fYear :
2014
Firstpage :
989
Lastpage :
993
Abstract :
The effect on transistors when maximum collector-emitter voltage under condition base is open (vceo), maximum collector-base voltage under condition emitter is open (vcbo), maximum collector-emitter voltage under condition base is shortened (vces) and maximum collector-base voltage under condition emitter is shortened (vcbs) ratings are got exceeded in two circuits are studied by visual analysis, x-ray examination, electrical examination and microscopic examination. This study helps in increasing the reliability of transistor used in all modern electronic equipments. We have proposed here for the implementation of snubber circuit to reduce the problem mentioned above. The results of visual analysis, electrical examination and microscopic examinations is shown in the form of pictures. Our proposal can be implemented in many house appliances, as common people are generally not aware of this fact of transistor ratings so the accidents due to unawareness can be prevented.
Keywords :
bipolar transistor circuits; semiconductor device reliability; snubbers; BJT; X-ray examination; condition emitter; electrical examination; electronic equipments; house appliances; maximum collector-base voltage; maximum collector-emitter voltage; microscopic examinations; snubber circuit; transistor reliability; visual analysis; Junctions; Microscopy; Snubbers; Switches; Transistors; Visualization; Wires; Snubber circuit; Vcbo; Vceo; Vces; Vcev;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Communication Networks (CICN), 2014 International Conference on
Print_ISBN :
978-1-4799-6928-9
Type :
conf
DOI :
10.1109/CICN.2014.208
Filename :
7065628
Link To Document :
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