DocumentCode :
358105
Title :
Toward analog circuit synthesis: a global methodology based upon design of experiments
Author :
Deval, Y. ; Begueret, J.B. ; Tomas, Jean ; Fouillat, P.
Author_Institution :
ENSERB, Bordeaux I Univ., France
fYear :
2000
fDate :
2000
Firstpage :
295
Lastpage :
300
Abstract :
An analog design methodology taking advantages of design of experiments for global optimization purposes is described. Starting with hierarchically based topology, this approach largely reduces simulation cost to reach an efficient result with regards to a user-defined objective function. The design of a fully BiCMOS low noise amplifier is detailed as an example: among the roughly 8200 possible combinations, only fifty simulations lead to what might be the best architecture. A test chip demonstrates the methodology ability to extrapolate high performance circuits
Keywords :
BiCMOS analogue integrated circuits; analogue integrated circuits; audio-frequency amplifiers; circuit CAD; circuit optimisation; circuit simulation; current mirrors; design of experiments; integrated circuit design; network topology; AF amplifier; SADIC methodology; analog circuit synthesis; analog design methodology; current conveyor; current mirrors; design of experiments; fully BiCMOS LNA; global methodology; global optimization; hierarchically based topology; high performance circuits extrapolation; impedance adapter; reduced simulation cost; test chip; user-defined objective function; Analog circuits; BiCMOS integrated circuits; Circuit noise; Circuit simulation; Circuit synthesis; Circuit testing; Circuit topology; Cost function; Design methodology; Design optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits and Systems Design, 2000. Proceedings. 13th Symposium on
Conference_Location :
Manaus
Print_ISBN :
0-7695-0843-X
Type :
conf
DOI :
10.1109/SBCCI.2000.876045
Filename :
876045
Link To Document :
بازگشت