DocumentCode
3581319
Title
Efficient architecture and implementation of PHY WLAN receiver on reconfigurable platforms
Author
Priya, D. Keerthi ; Devi, M. Vani
Author_Institution
Dept. of Avionics, Indian Inst. of Space Sci. & Technol., Trivandrum, India
fYear
2014
Firstpage
1
Lastpage
6
Abstract
This paper presents the design, implementation and validation of PHYsical Layer WLAN Receiver customised for IEEE 802.11a/g standards. Since the performance requirements for receiver are fixed, the design strategy was mainly focused on the algorithms chosen for receiver in order to achieve a desired performance and also reduction in hardware cost and latency.
Keywords
radio receivers; telecommunication standards; wireless LAN; IEEE 802.11a/g standards; PHY WLAN receiver; physical layer WLAN receiver; reconfigurable platform; Algorithm design and analysis; Channel estimation; OFDM; Receivers; Synchronization; Transmitters; Wireless LAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Communications Technologies (ICCCT), 2014 International Conference on
Type
conf
DOI
10.1109/ICCCT2.2014.7066703
Filename
7066703
Link To Document